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Numerical Analysis of a Si based Gate All Around Metal Semiconductor Field Effect Transistor

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dc.contributor.author Rahman, Mahsab Al
dc.contributor.author Ratree, Maliha Marjan
dc.date.accessioned 2018-10-16T05:12:37Z
dc.date.available 2018-10-16T05:12:37Z
dc.date.issued 4/4/2018
dc.identifier.uri http://dspace.ewubd.edu/handle/2525/2764
dc.description This thesis submitted in partial fulfillment of the requirements for the degree of B.Sc in Electrical and Electronic Engineering of East West University, Dhaka, Bangladesh. en_US
dc.description.abstract With the advent in time, as the Moore’s law approaches horizon; novel semiconductor devices such as the Gate All Around Metal Semiconductor Field Effect Transistor (GAA-MESFET) transistor arrives at the stage as the next big thing in the world of electronics. This is because as the dimensions planar MOSFET shrinks to an even smaller scale, the increase in SCE(Short Channel Effect) becomes even more prominent thus degrading the device’s performance. Thus the need of the hour is an transistor that can provide better control over SCE and GAA-MESFET can be just that ray of hope. It has become an extremely promising candidate in the sub 22 nm scale nano-devices due to its simpler fabrication process and remarkable short channel performances. In this undergraduate thesis, investigation of the behaviour of such GAA-MESFET by changing various physical parameters while trying to infer about its potential behaviour aka performance has been done. Use of High-K dielectric material alongside a stack of Low K and High k material as insulator was also done and its corresponding performance was observed. en_US
dc.language.iso en_US en_US
dc.publisher East West University en_US
dc.relation.ispartofseries ;EEE00163
dc.subject Numerical Analysis of a Si based Gate All Around Metal Semiconductor Field Effect Transistor en_US
dc.title Numerical Analysis of a Si based Gate All Around Metal Semiconductor Field Effect Transistor en_US
dc.type Thesis en_US


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